Thursday, 14 March 2013

TDM : Positive Justification in PDH


Let us read the concept of positive justification.


         The diagram above illustrates the basic principle of positive justification.  There are 4 asynchronous inputs. All are brought to same frequency ( i.e.36 bps) by adding appropriate number of redundant bit to each tributary. Now all these 4 synchronous 36 bps inputs are multiplexed to get the output rate of 144 bps.


        Revrse of this process takes place at the demultiplexer. From each tributary signals, redundant bits are removed to recover the original signal. These redundant bits are called “stuffing” or “justification” bits. The higher order stream will be having  frame structure and framing bits so that interleaved tributary bits can be recovered.

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